Después de días de quebraderos de cabeza, consultas a Torlus (gracias, gracias!, visitar varias páginas, he conseguido implementar una UART primitiva que transmite una “A” cada segundo. Mola!. Aquí tenéis el código, ejemplo todavía de absoluto novato. Pero funciona! 
Ya lo mejoraremos próximamente 
library IEEE;
use IEEE.STD_LOGIC_1164.ALL;
use IEEE.STD_LOGIC_ARITH.ALL;
use IEEE.STD_LOGIC_UNSIGNED.ALL;
—- Uncomment the following library declaration if instantiating
—- any Xilinx primitives in this code.
–library UNISIM;
–use UNISIM.VComponents.all;
entity rs232vhdl is
port(clk50 : in std_logic;
TXD : out std_logic);
end rs232vhdl;
architecture Behavioral of rs232vhdl is
signal clk_serial : std_logic; –reloj para el puerto serial
signal flagDATA, flagSTOP, flagSTART, unlock : std_logic;
signal index: std_logic_vector (2 downto 0) :=”000″;
signal count : std_logic_vector (11 downto 0);
signal serial_data : std_logic_vector(7 downto 0);
signal count9600 : std_logic_vector (13 downto 0) :=”00000000000000″;
begin
CLK: process (clk50)
begin
if clk50′event and clk50=’1′ then
count <= count + “000000000001″;
if count = “101000101001″ then — 2602 ma o meno
if clk_serial = ‘0′ then
clk_serial <= ‘1′;
else
clk_serial <= ‘0′;
end if;
count <= “000000000000″;
end if;
end if;
end process CLK;
TRX: process (clk_serial)
begin
serial_data <= “01000001″;
if clk_serial’event and clk_serial =’1′ then
count9600 <=count9600 + “00000000000001″;
if count9600>= “10010101110111″ then — 9591
if (flagSTART= ‘1′ and unlock=’0′) then
TXD<=’0′;
flagDATA<=’1′;
flagSTOP <= ‘0′;
flagSTART<=’0′;
unlock<=’1′;
end if;
if (flagDATA = ‘1′ and unlock=’1′) then
TXD <= serial_data(conv_integer(index));
if index=”111″ then
index<=”000″;
flagDATA<=’0′;
flagSTOP<=’1′;
unlock<=’0′;
end if;
index<= index+”001″;
end if;
if (flagSTOP=’1′ and unlock=’0′) then
TXD <=’1′;
flagSTOP<=’0′;
flagSTART<=’1′;
unlock<=’0′;
end if;
if count9600 =”10010110000000″ then –9600?
count9600 <=”00000000000000″;
end if;
end if; –end TXD
if (flagSTART = ‘0′ and unlock=’0′) then
TXD <= ‘1′;
flagSTART<=’1′;
end if;
end if; –end clk
end process TRX;
end Behavioral;
